When powering on a RISC OS 3 based machine, it goes through a series of basic tests to ensure the machine is operating correctly. This is known as a Power On Self Test sequence or POST sequence for short.
There are many different RISC OS 3 POST errors and there are a handful of errors that are more common than others. These errors are usually due to battery leakage damaging the hardware or flat batteries resulting in random data in the CMOS which requires that a machine is reset to default values.
On later machines where they are fitted with a rechargeable battery to power the CMOS, when the battery fails and leaks, it can cause damage to the CMOS chip and/or surrounding area of the PCB.
VIDC Enhancer related errors are typically non-fatal and the machine will continue to boot successfully after reporting the following errors. These errors usually occur when the VIDC Enhancer has a manual control left in the on position or it is failing to provide a 24Mhz signal to the VIDC chip whilst the POST is being performed.
The Acorn CMOS settings can be reset to a valid set of defaults by holding down the DEL key whilst powering on the computer. That is to say, whilst powered off, hold down the DEL key and turn the power on keeping the DEL key depressed until you see a black screen with a red border indicating that the CMOS has been reset.
Acorn RISC computer fault codes are reported via the flashing of the floppy drive light in a sequence of 8 blocks of 4 flashes. Each block of four flashes (e.g. long short short long) represents a set of fault and status bits which can be translated into a list of error codes.
Select the boxes that represent the long flashes from your computer to derive the fault code and its translation.